In recent years, data transfer between semiconductor devices (e.g. between a CPU and a memory) requires a higher data transfer rate. For the purpose of further increasing the data transfer rate, the amplitudes of input and output signals have been reduced more and more. When the amplitudes of input and output signals are reduced, the accuracy required for the impedance of an output buffer becomes stricter in order to output a signal with an exact amplitude.
The impedance of the output buffer not only varies depending on the process condition in the manufacture, but changes also in actual use of a semiconductor device due to the influence of a variation in ambient temperature or a fluctuation in power supply voltage. Therefore, when high impedance accuracy is required for the output buffer, the output buffer should have an impedance adjustment function. Such impedance adjustment of the output buffer is carried out using a circuit, generally called an impedance control circuit, which is provided in the semiconductor device.
The impedance control circuit includes a replica buffer having the same structure as the output buffer. The impedance adjustment of the output buffer is carried out in the following manner. An external resistance is connected between an impedance adjustment external terminal (ZQ terminal) of the semiconductor device and, for example, a board on which the semiconductor device is mounted. A voltage appearing at the ZQ terminal is compared with a reference voltage. According to a comparison result, the impedance of the replica buffer is adjusted. Then, the content of adjustment (specified by impedance control information) of the replica buffer is reflected on the output buffer. Thus, the impedance of the output buffer is adjusted to a desired value.
For example, Patent Document 1 (JP-A-2005-150392) discloses one example of a semiconductor device including an impedance control circuit which is adapted to adjust the impedance of an output buffer.